At the physical layer of a communication channel, integrated circuits transmit and receive signals over a transmission line. Transmit circuitry multiplexes several parallel lines of digital data and provides an encoded serial analog signal to the transmission line. Receive circuitry decodes and de-multiplexed the analog signal for further processing. A single integrated circuit device can be used to both transmit and receive signals at each end of a transmission line.
As one measure of performance is its data rate, the data rate of such devices can outpace the capabilities of the test equipment used to verify its functionality. Programmable automated test equipment typically used to perform functional testing, however, is often costly to upgrade or replace. As such, test methods which extend tester utilization are desirable.
FIG. 1 illustrates a possible way to test the functionality of a device having a transmission rate faster than the operating frequency of the tester 100. A 100 MHz tester 100, such as a 100 MHz Credence DUO, supplied by Credence Systems Corp. of Fremont, Calif., is connected to digital lines 25a and 25b of a transmit/receive integrated circuit 200. Signals are provided to the digital lines 25a which operate at a 25 MHz rate. The transmit circuitry within the device uses the data provided from digital lines 25a to produce an MLT3 encoded analog signal at twisted pair transmit terminals 125a. 
A jumper 10 is provided between the twisted pair transmit terminals 125a and twisted pair receive terminal 125b of the device 200. The 125 MHz MLT3 signal is processed by receive circuitry and output on the 25 MHz digital receive lines 25b. The digital signals at 25b are tested by the t ester 100 to verify proper functionality of the transmit and receive circuitry of integrated circuit 200.
This loop back testing methodology has the advantage of functionally testing the transmit and receive circuitry of the device 200 without requiring the tester 100 to provide the 125 MHz. This methodology, however, does not allow independent testing of the transmit and the receive circuits. As a result, some capabilities of the device 200 can not be tested. For example, the ability of the phase locked loop portion of the receive circuitry to track at varying frequencies is not tested using the loop back methodology. As such, while loop back testing does provide some indication of the functionality of the device 200, it does not fully test the functionality of the device 200.
In one embodiment, a method is provided for testing using a programmable tester to generate a driven three state signal having a data rate faster than a maximum selectable rate of test vectors. The test vector has vector characters, each controlling a test state of a pin of a device under test. The method includes selecting a vector rate slower than a desired data rate of the driven three state signal and controlling a tester I/O device during a vector period to provide an output signal having a driven high state, a driven low state, or an inhibited state. The output signal is supplied to an input of a pull-to-center circuit adapted to provide a driven high state, a driven low state, or an output driven to a state intermediate of the driven high and the driven low states when the input of the pull-to-center circuit is supplied with an inhibited state at the input. The three state signal is utilized in testing the device under test.